Compliant IEEE
1394 and compatible with proposal 1394A
Compliant with
PCI specification revision 2.2
Detect lost
cycle start messages
Generates 32-bit
CRC for transmission of 1394 packets
Perform 32-bit
CRC checking on reception of 1394 packets
Supports IEEE
1394 bus transfer rates of 100/400 Mbps
Supports up
to 63 devices than can be run simultaneously on a computer
Provides three
size-programmable FIFOs
Programmable
5 channel address comparator logic for receiving incoming 1394
packets and assigning them to a DMA channel
Supports DMA
transfers between 1394 and local bus RAM, ROM, AUX or ZV
Provides PCI
bus master function for supporting DMA operations
Provides PCI
slave function for read-write access of internal registers
Implements
a 32-bit PCI address-data path
Provides PCI
address-data parity checking
Provides a
programmable 8/16-bit external Local Bus for implementing a
dedicated data to external logic
Provides Software
control of interrupt events
Cable power
Presence Monitoring
Operates from
3.3 Volt power supply while maintaining 5 Volt tolerant input
Supports physical
write posting of up to three outstanding transactions
Packaged in
100 TQFP
PCI Power Management
Compliant
Serial ROM
Interface Supports 2-Wire Devices